Intel MMX Technology


MMX technology defines a simple and flexible SIMD execution model to handle 64-bit packed integer data. This model adds the following features to the IA-32 architecture, while maintaining backwards compatibility with all IA-32 applications and operating-system code:
• Eight new 64-bit data registers, called MMX registers
• Three new packed data types:
— 64-bit packed byte integers (signed and unsigned)
— 64-bit packed word integers (signed and unsigned)
— 64-bit packed doubleword integers (signed and unsigned)
• Instructions that support the new data types and to handle MMX state management
• Extensions to the CPUID instruction